The gate insulation film of a MIS (metal/insulator/silicon) transistor is requited to have various high-performance electric properties and also high reliability, such as low leakage current characteristic, low interface state density, high breakdown voltage, high resistance against hot carriers, uniform threshold voltage characteristic, and the like.
In order to satisfy these various requirements, the technology of thermal oxidation process has been used conventionally as the formation technology of the gate insulation film, wherein the thermal oxidation technology uses oxygen molecules or water molecules at the temperature of about 800° C. or more.
It should be noted that a thermal oxidation process has been conducted conventionally after conducting a preprocessing process of removing surface contaminants such as organic materials, metals, particles, and the like, by a conducting cleaning process. It should be noted that such a conventional cleaning process includes a final cleaning process that uses a diluted hydrofluoric acid or hydrogenated water for terminating the dangling bonds exiting on the silicon surface by hydrogen. Thereby, formation of native oxide film on the silicon surface is suppressed, and the silicon substrate thus having a cleaned surface is forwarded to the following process of thermal oxidation. In the thermal oxidation process, the terminating hydrogen at the surface undergoes decoupling during the process of raising the temperature of the silicon substrate in an inert gas atmosphere such as argon (Ar) gas atmosphere. Oxidation of the silicon surface is conducted thereafter at the temperature of about 800° C. or more in the atmosphere in which oxygen molecules or water molecules are introduced.
In the conventional thermal oxidation process, satisfactory oxide/silicon interface characteristics, oxide breakdown characteristics, leakage current characteristics, and the like, are achieved only in the case a silicon surface having the (100) orientation is used for the formation of the silicon oxide film. Further, it is known that there arises a remarkable deterioration of leakage characteristic in the case the thickness of the silicon oxide film thus formed by the conventional thermal oxidation process is reduced to about 2 nm or less. Thus, it has been difficult to realize a high-performance miniaturized transistor that requires decrease of the gate insulation film thickness.
Further, in the case the silicon oxide film is formed on a silicon crystal having a surface orientation other than the (100) orientation or on a polysilicon formed on an insulation film, there arises a problem of formation of large interface state density at the oxide/silicon interface as compared with the case the silicon oxide film is formed on the (100)-oriented silicon surface, and this holds true even when the silicon oxide film is formed by the thermal oxidation technology. It should be noted that a polysilicon film formed on an insulation film has a primarily (111) oriented surface. Thus, such a silicon oxide film has poor electric properties in terms of breakdown characteristics, leakage current characteristics, and the like, particularly when the thickness thereof is reduced, and there has been a need of increasing the film thickness of the silicon oxide film when using such a silicon oxide film.
Meanwhile, the use of large-diameter silicon wafer substrate or large-area glass substrate is increasing these days for improving the efficiency of semiconductor device production. In order to form transistors on the entire surface of such a large-size substrate with uniform characteristics and with high throughput, it is necessary to form the insulation film at a low temperature so as to decrease the magnitude of the temperature change, which takes place at the time of the heating process or at the time of the cooling process. Further, the process of forming such an insulation film is required to have small temperature dependence. In the conventional thermal oxidation process, it should be noted that there has been a large fluctuation of oxidation reaction rate caused by temperature fluctuation, and it has been difficult to conduct the production process of semiconductor devices with high throughput while using a large-area substrate.
In order to solve these problems associated with the conventional thermal oxidation technology, various low-temperature film formation processes have been attempted. Among others, the technology disclosed in Japanese Laid-Open Patent Publication 11-279773 or the technology disclosed in Technical Digest of International Electron Devices Meeting, 1999, pp. 249-252, or in 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 76-177, achieves relatively good electronic properties for the film by conducting the oxidation of the silicon surface by using atomic state oxygen O*. There, an inert gas having a large metastable level is used for the atomization of the oxygen molecules, and for this, the inert gas is introduced into plasma together with gaseous oxygen molecules.
In these technologies, it should be noted that a microwave is irradiated to the mixed gas formed of an inert krypton (Kr) gas and an oxygen (O2) gas, and a large amount of atomic state oxygen O* are formed. Thereby, the oxidation of silicon is conducted at a temperature of about 400° C., and the properties comparable to those of the conventional thermal oxidation process, such as low leakage current characteristics, low interface state density high breakdown voltage, and the like, are achieved. Further, according to this oxidation technology, a high-quality oxide film is obtained also on the silicon surface having a surface orientation other than the (100) surface.
On the other hand, such a conventional silicon oxide film formation technology, even when using the microwave plasma, could at best realize a silicon oxide film having electric properties comparable to those of the film formed by the conventional thermal oxidation process, which uses oxygen molecules or water molecules. Particularly, it has been not possible to obtain the desired low leakage current characteristics in the case the silicon oxide film has a thickness of about 2 nm or less on the silicon substrate surface. Thus, it has been difficult to realize high-performance, miniaturized transistors that require further decrease of the gate insulation film thickness, similarly to the case of conventional thermal oxide film formation technology.
Further, there has been a problem that the silicon oxide film thus formed shows severe degradation of electric properties in the case the silicon oxide film is used for a transistor, such as degradation of conductance caused by hot carrier injection or increase of leakage current in the case the silicon oxide film is used in a device such as a flash memory, which relies upon tunneling of electrons caused through the silicon oxide film, as compared with the case of using a silicon oxide film formed by the conventional thermal processes.
FIG. 1 shows the schematic structure of a conventional flash memory device 10.
Referring to FIG. 1, the flash memory device 10 is formed on a silicon substrate 11 doped to p-type or n-type and there is formed a floating gate electrode 13 on the silicon substrate 11 via a tunneling oxide film 12. The floating gate electrode 13 is covered with an inter-electrode insulation film 14, and a control gate electrode 15 is formed on the floating gate electrode 13 via the inter-electrode insulation film 14. Further, a source region 11B and a drain region 11C of n-type or p-type are formed in the silicon substrate 11 at both lateral sides of a channel region 11A right underneath the floating gate electrode 13.
In the flash memory device 10 of FIG. 1, the control gate electrode 15 causes capacitance coupling with the floating gate electrode via the inter-electrode insulation film 14, and as a result, the potential of the floating gate electrode is controlled by the control voltage applied to the control gate electrode 15.
Thus, in the case information is written into the floating gate electrode in the flash memory device 10 of FIG. 1, a predetermined drive voltage is applied across the drain region 11C and the source region 11B and a predetermined positive write voltage is applied to the control gate electrode 15. Thereby, there are formed hot electrons as a result of acceleration in the vicinity of the drain region 11C, and the hot electrons thus formed are injected into the floating gate electrode 13 via the tunneling oxide film 12.
In the case the information thus written is to be erased, a predetermined erase voltage is applied to the silicon substrate 11 or to the source region 11B, and the electrons in the floating gate electrode 13 are pulled out. In the case of reading the written information, a predetermined read voltage is applied to the control gate electrode 15 and the electron current flowing through the channel region 11A from the source region 11B to the drain region 11C is detected.
FIG. 2A shows the band structure of the flash memory 10 of FIG. 1 in the cross-sectional view that includes the floating gate electrode 13, the tunneling oxide film 12 and the silicon substrate 11, wherein FIG. 2A shows the state in which no control voltage is applied to the control gate electrode 15.
Referring to FIG. 2A, the tunneling insulation film 12 forms a potential barrier and it can be seen that the injection of the electrons on the conduction band Ec of the silicon substrate 11 into the floating gate electrode 13 is effectively blocked.
FIG. 2B shows the band structure for the case a write voltage is applied to the control gate electrode 15.
Referring to FIG. 2B, there is induced modification of the band structure in the tunneling insulation film 12 as a result of application of the write voltage, and as a result, the conduction band Ec forms a triangular potential. Thus, the hot electrons thus formed in the channel region A are injected into the floating gate electrode 13 after passing through the triangular potential barrier in the form of Fowler-Nordheim tunneling current.
Now, in order to increase the writing speed in the flash memory device 10, there is a need of increasing the tunneling probability of the tunneling current passing through the triangular potential in the state of FIG. 2B. This can be achieved by decreasing the thickness of the tunneling oxide film 12. In the case the thickness of the tunneling oxide film 12 is decreased, on the other hand, the electrons in the channel may pass through the tunneling oxide film 12 in the non-writing state shown in FIG. 2B by causing tunneling and form a leakage current.
FIG. 3 shows the relationship between the electric field applied to the tunneling oxide film 12 and the current density of the tunneling current passing through the tunneling oxide film 12.
Referring to FIG. 3, it is required that a tunneling current of about 1 A/cm2 can flow through the tunneling oxide film 12 in response to an electric field of about 10 MV/cm applied to the tunneling oxide film 12 in the writing state of FIG. 2B when to realize the writing time of 1-10μ seconds in the flash memory device 10. In the case of non-writing state of FIG. 2A, on the other hand, it is required that the leakage current through the tunneling oxide film 12 be suppressed to 10−15 A/cm2 or less at the application electric filed of 1 MV/cm2. Thus, the conventional flash memory device 10 realizes the electric field—current characteristic shown in FIG. 3 by a straight line by using a thermal oxide film having a thickness of several nanometers for the tunneling oxide film 12.
On the other hand, when an attempt is made to reduce the thickness of the tunneling oxide film 12 for reducing the write time, the electric field-current characteristic of the tunneling oxide film 12 is changed as represented in FIG. 3 by a curved line. There, it can be seen that, while there is caused a large increase of the tunneling current in the case the electric field of 10 MV/cm is applied, and while the conventional tunneling current density of 1 A/cm2 is realized in the state of low electric field, there is caused a large increase in the leakage current in the non-writing state, and thus, the information written into the floating gate electrode 13 is no longer retained.